1. Field of the Invention
The present invention relates to a display device, and more particularly, to an organic electroluminescent display (OELD) device.
2. Discussion of the Related Art
In general, an OELD device emits light by injecting electrons from a cathode and injecting holes from an anode into an emission layer, combining the electrons with the holes, generating excitons, and transitioning the excitons from an excited state to a ground state. Unlike liquid crystal display (LCD) devices, an OELD does not require an additional light source to emit light since the transition of the excitons between the excited and ground states causes light emission. Accordingly, the size and weight of the OELD device is less than that of an LCD device. In addition, the OELD device has low power consumption, superior image brightness, and fast response time. Thus, the OELD devices are employed in consumer electronic applications, such as cellular phones, car navigation systems (CNS), personal digital assistants (PDA), camcorders, and palmtop computers. Moreover, since OELD devices are manufactured using a relatively simple fabrication process, OELD production costs much less than LCD.
There are currently at least two different types of OELD devices: passive matrix OELD devices and active matrix OELD devices. Although the passive matrix OELD devices have simple structures and are formed by simple fabrication processes, passive matrix OELD devices require a relatively high amount of power to operate. In addition, the display size of passive matrix OELD devices is limited due to their structure. Furthermore, as the number of conductive lines increases in a passive matrix OELD device, an aperture ratio of the passive matrix OELD devices decreases. On the other hand, active matrix OELD devices have a high emission efficiency and can produce high-quality images for larger displays with relatively low power consumption.
FIG. 1 is a cross-sectional view of an OELD device according to the related art. Referring to FIG. 1, an OELD device 10 includes first and second substrates 12 and 28 that are spaced apart from each other and bonded together using a sealant 26. The first substrate 12 includes an array element layer 14 having a thin film transistor (TFT) T formed on an inner surface of the first substrate 12. A first electrode 16, an organic electroluminescent (EL) layer 18, and a second electrode 20 are sequentially formed on the array element layer 14. The organic EL layer 18 may include red, green, and blue emission layers to display full-color images. Each of the red, green, and blue emission layers may be disposed in each pixel region P. The second substrate 28 includes a moisture absorbent desiccant 22 that eliminates moisture and oxygen that may penetrate the organic EL layer 18. The moisture absorbent desiccant 22 is disposed within an etched portion of the second substrate 28, and is fixed by a holding element 25.
FIG. 2 is a plan view of an array element layer of an OELD device according to the related art. Referring to FIG. 2, the array element layer 14 (shown in FIG. 1) includes a switching thin film transistor TS, a driving thin film transistor TD, and a storage capacitor CST formed on a transparent insulating substrate 12, such as glass or plastic. The switching thin film transistor TS and the driving thin film transistor TD may include a combination of at least one TFT. In addition, a gate line 32 and a data line 34 crossing each other are formed on the substrate 12. A pixel region P is defined by a crossing of the gate line 32 and the data line 34. An insulating layer (not shown) is interposed between the gate line 32 and the data line 34. A power line 35 is disposed parallel to and spaced apart from the data line 34 and also crosses over the gate line 32.
In FIG. 2, the switching thin film transistor TS includes a switching gate electrode 36, a switching active layer 40, a switching source electrode 46, and a switching drain electrode 50. Similarly, the driving thin film transistor TD includes a driving gate electrode 38, a driving active layer 42, a driving source electrode 48 and a driving drain electrode 52. The switching gate electrode 36 is connected to the gate line 32, and the switching source electrode 46 is connected to the data line 34. The switching drain electrode 50 is connected to the driving gate electrode 38 via a first contact hole 54. The driving source electrode 48 is connected to the power line 35 via a second contact hole 56. In addition, the driving drain electrode 52 is connected to a first electrode 16 at the pixel region P. The power line 35 overlaps a first capacitor electrode 15. An insulating layer is interposed therebetween to form the storage capacitor CST.
Although not shown, a gate pad, a data pad and a power pad are disposed in a pad region in a periphery region of a display region transmitting light. The gate pad, the data pad and the power pad are formed in end portions of the gate line, the data line and the power line, respectively. Further, a ground signal is applied to a ground pad and it is disposed in one of the portions corresponding to the gate, the data and the power pads. In general, the power pad and the ground pad are disposed in their respective areas in the pad portions. Therefore, current or carrier may flow in a certain direction, so that a non-uniform image quality occurs due to a resistance deviation in a large size model different from a small size model.
FIG. 3 is a plan view of an OELD device according to the related art. Referring to FIG. 3, a substrate 12 is prepared with a display region DD and a pad region PP in a periphery of the display region DD. The pad region PP includes first to fourth pad regions PP1 to PP4. The first pad region PP4 is disposed adjacent to the second pad region PP2. A gate pad 60, a data pad 50, a power pad 70 and a ground pad 80 are formed in the first to fourth pad regions PP1 to PP4, respectively. For example, a gate signal, a data signal, a power signal and a ground signal are applied to the gate pad 60, the data pad 50, the power pad 70 and the ground pad 80 through tape automated bonding, respectively.
The first electrode 16 (shown in FIG. 1) in the pixel region P (shown in FIG. 1) is connected to the driving thin film transistor TD (shown in FIG. 2), the organic electroluminescent layer 18 (shown in FIG. 1) is disposed on the first electrode 16, and the second electrode 20 (shown in FIG. 1) is disposed over the entire surface of the substrate 12 having the organic electroluminescent layer 18. The electric potential of the second electrode 20 can be maintained by applying a common voltage through the ground pad 80.
For example, the second electrode 20 and the ground pad 80 are connected to each other via a first contact hole 27 in the display region DD and the ground pad 80 is connected to an external circuit (not shown) via a second contact hole 29 in the pad region PP. It should be noted that a moving direction 90 of the carriers or current is from the power pad 70 to the ground pad 80. Therefore, the power pad 70 may be defined as a pad where a flow of carriers or current begins, and the ground pad 80 may be defined as a pad where the flow of the carrier or current ends.
In other words, carrier or current flows along one direction from in the third pad portion PP3 to the fourth pad portion PP4. Consequently, when this arrangement structure for the pad region PP is applied to a small size OELD model, a resistance deviation can be reduced because of the small size of the OELD. Therefore, image quality problems do not occur in all regions of the OELD. However, the bigger the size of the OELD panel, the lower the image quality.